Cryptographic Hardware and Embedded Systems – CHES 2012: by Sébastien Briais, Stéphane Caron, Jean-Michel Cioranesco,

By Sébastien Briais, Stéphane Caron, Jean-Michel Cioranesco, Jean-Luc Danger (auth.), Emmanuel Prouff, Patrick Schaumont (eds.)

This booklet constitutes the complaints of the 14th foreign Workshop on Cryptographic and Embedded structures, CHES 2012, held in Leuven, Belgium, in September 2012. The 32 papers awarded including 1 invited speak have been conscientiously reviewed and chosen from a hundred and twenty submissions. The papers are geared up within the following topical sections: intrusive assaults and countermeasures; protecting; better fault assaults and facet channel research; leakage resiliency and safeguard research; bodily unclonable capabilities; effective implementations; light-weight cryptography; we nonetheless love RSA; and implementations.

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Extra resources for Cryptographic Hardware and Embedded Systems – CHES 2012: 14th International Workshop, Leuven, Belgium, September 9-12, 2012. Proceedings

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Synchronization method for SCA and fault attacks. Journal of Cryptographic Engineering (JCEN) 1(1), 71–77 (2011) 27. html 28. : Data Remanence in Flash Memory Devices. , Sunar, B. ) CHES 2005. LNCS, vol. 3659, pp. 339–353. Springer, Heidelberg (2005) Appendix A STAPL Example Code PROCEDURE IS_SECOK USES GV,DO_EXIT; IF ( ! (SECKEY_OK==0) ) THEN GOTO SECOK; STATUS = -35; PRINT "Error, pass key match failure"; CALL DO_EXIT; SECOK: LABEL_SEPARATOR = 0; ENDPROC; PROCEDURE DO_CHECK_R USES GV,DO_EXIT,DO_READ_SECURITY; CALL DO_READ_SECURITY; IF ( !

A)JTAG TAP state machine, (b)Simplified ProASIC3 security Knowing all the JTAG commands is not sufficient to search for backdoors. Firstly, the obtained list could be incomplete because the STAPL file is compiled only with commands which serve a particular task. Secondly, although subroutines, functions and variables are meaningfully named, the IR level commands are not explained and usually remain as numbers. That complicates the reverse engineering of the JTAG functionality. What adds to the complexity is the sequence of commands.

Using a low-cost system it becomes possible to independently test silicon for backdoors and Trojans in a matter of weeks. It would take many years to perform the same task using standard DPA. Most silicon chips are now designed and made abroad by third parties. Is there any independent way to evaluate these products that are used in critical systems? References 1. : A survey of hardware Trojan taxonomy and detection. IEEE Design and Test of Computers (2010) 2. Military ProASIC3/EL FPGA Fabric User’s Guide.

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